TEKNIK ELEKTRONIKA

Symmetricom has rolled out what it bills as the world's smallest and lowest-power atomic oscillator. The newest member of Symmetricom's QUANTUM

View the Original article

Silicon Laboratories Inc. has launched a family of versatile in-circuit programmable CMOS clock generators. The new Si5350 and Si5351 octal clock generators with on-chip voltage-controlled crystal oscillators (VCXOs) can replace traditional multi-component phase lock loop (PLL) solutions with a single clock IC.

 

The Si5350 and Si5351 clock generators utilise Silicon Labs’ patented MultiSynth technology to provide superior frequency flexibility, lower jitter, lower power and a smaller footprint than comparable clock generator designs using three of four PLLs. Unlike traditional clock generators that require a separate PLL for each arbitrary output frequency, the Si5350 and Si5351 devices synthesise a unique frequency on each of their eight outputs. By integrating clock synthesis in the output divider stage instead of the PLL, the Si5350 and Si5351 provide the same clock synthesis capability as eight PLLs while occupying much less board space and consuming less power.

 

The Si5350 and Si5351 are able to generate a full set of system clocks (audio, video, interface and SoC) and can synthesise any combination of eight unique, non-integer-related frequencies up to 133 MHz with zero frequency error. They can also simultaneously generate free-running clocks from a crystal input as well as clocks synchronised to a reference clock or an analogue control voltage, allowing multiple board-level timing domains to be clocked from a single source.

 

The Si5350 and Si5351 simplify system-level design by providing glitchless frequency shifting between two clock rates on up to six of the device outputs. This simplifies clock synthesis in audio and video applications, which often require a combination of frequencies to support multiple formats and display standards. It also facilitates processor overclocking to improve CPU performance in embedded applications and enables board-level power savings by reducing the output clock frequency.

 

Image: Silicon Laboratories

More info

Silicon Laboratories news release



View the Original article

IBM’s new z196 microprocessor integrates four cores with 1.4 billion transistors fabricated in 45-nm technology on an area of 512 square millimetres. Operating at 5.2 GHz, the processor features a superscalar CISC architecture with an out-of-order pipeline.

Each of the four cores has a dedicated 64-KB L1 instruction cache and 128-KB L1 data cache, as well as a 1.5-MB L2 cache. The chip also integrates a shared 24-MB L3 cache in eDRAM technology. Each processor core consists of six RISC-type execution units, two of which handle integer processing, along with two load/store units, a binary floating point processor, and an explicit decimal floating point processor.

The z196 processor is designed to support symmetrical multiprocessing (SMP), and several processors are combined in a multi-chip module (MCM) with extremely high processing power. This module also includes two storage controller (SC) units with an additional 192 MB of off-die L4 cache, which support data rates up to 48 GB/s. The SC chip has 1.5 billion transistors and nearly the same area as the z195 chip.

Each MCM contains six z195 processors and two SCs with a total cache size of 376.5 MB (L1

View the Original article